Computer Organization

Contents

1. Digital Circuits
1. Introduction
2. Decimal Number System
3. Binary Number System
3.1 Binary to Decimal Conversion
3.2 Decimal to Binary Conversion
4. Octal Number System
4.1 Decimal to Octal Conversion
4.2 Octal to Decimal Conversion
5. Hexa Decimal Number System
5.1 Decimal to Hex Conversion
5.2 Hex to Decimal Conversion
6. Inter-Conversion of One Code to Another
6.1 Octal to Binary Conversion
6.2 Binary to Octal Conversion
6.3 Hex to Binary Conversion
6.4 Binary to Hex Conversion
6.5 Hex to Octal and Octal to Hex Conversion
7. BCD Code
7.1 Binary to BCD Conversion
7.2 BCD to Binary Conversion3
8. Weighted and Unweighted Codes
8.1 Gray Code
9. Character Codes
9.1 ASCII Code
10. Binary Arithmetic
10.1 Binary Addition
10.2 Binary Subtraction
10.3 Binary Multiplication
10.4 Binary Division
11. Introduction to Logic Gates
12. Concept of Positive and Negative Logic
13. Introduction to Gates
13.1 Basic Gates
13.2 Derived Gates
14. Boolean Algebra and Identities
14.1 Boolean Identities
14.2 Some Proofs
15. De – Morgan’s Theorems
15.1 De – Morgan’s 1st Theorem
15.2 De – Morgan’s 2nd Theorem
16. Reduction of Logic Expression using Boolean Algebra
17. Deriving Boolean Expression from the given Circuit
18. Inter-conversion of Gates
18.1 Building All Basic Gates Using NAND Gates
18.2 Building All Basic Gates Using NOR Gates
19. Minterm, Maxterm and Karnaugh Maps
19.1 Min Term and Max Term
19.2 Karnaugh’s Map
20. Introduction to Combinational Circuits
20.1 Multiple Input, Multiple Output Combinational Circuits
21. Arithmetic Circuits
21.1 Adders
21.2 Subtractor
22. Multiplexer, Demultiplexer, ALU, Encoder and Decoder
22.1 Multiplexers
22.2 Demultiplexers
22.3 Encoder
22.4 Decoder
24. Introduction to Sequential Circuits
24.1 Terminologies Used
25. Latch
26. Flip-flops
26.1 RS Flip-flop (RS Latch)
26.2 D Flip-flop
26.3 JK Flip-flop
26.4 JK Master Slave Flip-flop
26.5 T Flip-flop
26.6 Applications of Flip-flops
27. Counters
27.1 Terms related to Counters
27.2 Asynchronous Counter (Ripple Counter)
27.3 Synchronous Counter
28. Shift Register
28.1 SISO Shift Register
28.2 SIPO Shift Register
28.3 PIPO Shift Register
28.4 PISO Shift Register

2. CPU, Memory and I/O Organizations
1. CPU
1.1 Block Diagram of the CPU
1.2 Functions of CPU
1.3 General Register Organization
1.4 Flags
1.5 Concept of RISC and CISC
1.6 Introduction to Hardwired and Micro-programmed CPU
2. Memory
2.1 Memory Organization
2.2 Memory System Overview
2.3 Memory Classification
3. Memory Hierarchy
3.1 Cache Memory
3.2 Internal Memory
3.3 External Memory (Secondary Memory)
3.4 Concept of Virtual Memory
4. Introduction to I/O Organization
5. Peripheral Devices
6. Input and Output Interface
7. Serial Communication
8. Concept of Interrupts
9. Interrupt Vector Table
10. Types of I/O Transfer
10.1 Programmed I/O Transfer
10.2 Interrupt Initiated I/O
10.3 DMA
10.4 DMA Controller

3. Architecture of Microprocessor and Parallel Processing  
1. Introduction
2. Block Diagram of 8086
2.1 Calculation of Effective Address
3. Numeric Coprocessor Concept
4. Concept of Parallelism
4.1 Parallel Computer Structure
5. Concept of Pipeline
5.1 Instruction Pipeline
5.2 Arithmetic Pipeline
6. Concept of RISC and CISC